Apr. 2020. “MicroNet for Efficient Language Modeling” accepted to Journal of Machine Learning Research 2020.
Apr. 2020. “HAT: Hardware-Aware Transformers for Efficient Natural Language Processing” accepted to ACL 2020.
Mar. 2020. “APQ: Joint Search for Network Architecture, Pruning and Quantization Policy” accepted to CVPR 2020.
Feb. 2020. I gave a talk at Qualcomm Research Center on “GCN-RL Circuit Designer: Transferable Transistor Sizing With Graph Neural Networks and Reinforcement Learning”.
Feb. 2020. I gave a talk in HPCA 2020 on “SpArch: Efficient Architecture for Sparse Matrix Multiplication”.
Feb. 2020. “GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learning” accepted to DAC 2020.
Dec. 2020. I gave a talk on Efficient Langauge Modeling at NeurIPS 2019 MicroNet Challenge.
Nov. 2019. “SpArch: Efficient Architecture for Sparse Matrix Multiplication” accepted to HPCA 2020.
Nov. 2019. I won the NeurIPS 2019 MicroNet Challenge, code open-sourced